Responsibilities

Assist in efforts to develop and fully characterize CMOS Wafer Process Technology for radiation hardened applications. Develop solutions to enable process control monitor testing and wafer acceptance specifications and criteria. Provide Support to Circuit Designers for radiation hardening methods, modeling and characterization. Conceive and deploy structures and their test methods for technology development and characterization. Develop methods, execute and oversee testing, and model behaviors for technology and circuit hardening. Establish and maintain technologies on behalf of Honeywell to support business plans and strategies. Characterize radiation effects on devices ( total ionizing dose, neutron displacement damage, dose rate upset, single event effects). Prepare test hardware, test plans, documentation. Compensation: The salary range for this position is $97,000 - $107,000. The actual base salary offer will depend on a variety of factors including experience, education, geography and other relevant factors. MINIMUM QUALIFICATIONS MS or PhD Degree in Electrical Engineering or Physics Graduate between May 2023 - December 2024 Ability and willingness to work on-site at the Honeywell Plymouth, MN facility (zip code 55441) US Citizenship is required Dual Citizenship is not allowed due to contractual requirements Active, or previously held USG Secret security clearance in good standing, or, no known barriers to achieve a USG Secret security clearance is required Ability and willingness to travel to radiation test facilities in the continental United States to perform on-site radiation testing WE VALUE Nuclear and quantum-mechanical physics knowledge Ability to pair physics knowledge and integrated circuit [IC] knowledge to comprehend radiation interactions with ICs, circuit primitive device types IC transistors, resistors, etc), and radiation testing equipment and principles of operation In-depth knowledge of transistor device physics Experience and willingness to work in laboratory settings to develop hardware for custom testing applications Good communication skills and high proficiency with Microsoft Office suite (Excel, PowerPoint, Word, Teams) Experience in CMOS technology test chip design for characterization and modeling purposes Knowledge of statistically designed experiments and regression methods for analyses and response surface modeling Experience working in multi-disciplinary teams Windows and LINUX operating systems knowledge and scripting languages