ASIC Design Engineer

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Get AI-powered advice on this job and more exclusive features. Cisco provided pay range This range is provided by Cisco. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more. Base pay range $152,400.00/yr - $221,800.00/yr The application window is expected to close on: 8/30/25
Have you got what it takes to succeed The following information should be read carefully by all candidates.
This role will be based out of our San Jose, CA office.
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.
Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Meet the Team
Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, verification engineers and interact with cross-functional software and product teams, working together to ensure the successful deployment of the ASIC in products.
Your Impact
Development of high-performance designs/ASICs from specification to tape-out. Micro-architectural definition and writing micro-architecture and implementation specifications. Implement Verilog RTL to meet timing and performance requirements. Help define, evolve, and support our design methodology. Collaborate with the verification, PD, DFT, Package and SW teams to develop next generation ASICs. Perform diagnostic and post silicon validation tests in the lab. Work with hardware and software teams to triage and root cause system, software, and customer failures.
Minimum Qualifications:
Bachelor’s degree in Electrical or Computer engineering and 7+ years of ASIC Design experience, or a Master's degree with 4+ years of relevant experience. Experience with Verilog and System Verilog programming. Experience with Micro-architecture, design and coding of complex blocks. Experience with Lint/CDC/Synthesis.
Preferred Qualifications:
Proven experience meeting and delivering project milestones and deadlines. Ability to communicate technical concepts to audiences spanning executives to junior engineers. Demonstrated ability in troubleshooting and debugging. Scripting experience (Python, Perl, TCL, shell programming).
Why Cisco
At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put – we power the future.
Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
We are Cisco, and our power starts with you.Seniority level Seniority levelNot Applicable Employment type Employment typeFull-time Job function IndustriesComputer Hardware Manufacturing, Software Development, and Computer Networking Products Referrals increase your chances of interviewing at Cisco by 2x Get notified about new Application Specific Integrated Circuit Design Engineer jobs in San Jose, CA . San Jose, CA $90,000 - $110,000 4 weeks ago Santa Clara, CA $108,000 - $212,750 5 days ago Sunnyvale, CA $132,000 - $189,000 3 days ago Santa Clara, CA $136,000 - $264,500 2 days ago Sunnyvale, CA $142,000 - $203,000 2 weeks ago San Jose, CA $110,000 - $145,000 3 weeks ago Application Specific Integrated Circuit Engineer Sunnyvale, CA $114,000 - $166,000 1 week ago Senior R&D Software Engineer, VLSI Floorplanning and Optimization San Jose, CA $148,000 - $340,500 1 day ago Silicon Engineer, Digital Design, Quantum AI Mountain View, CA $156,000 - $229,000 1 week ago ASIC Physical Design Engineer, Annapurna Labs Sunnyvale, CA $114,000 - $166,000 2 weeks ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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Location:
San Jose, CA
Salary:
$200
Category:
Engineering

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