Principal Memory Design Engineer/ Senior Technical Manager
New Yesterday
Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
Design dual rail custom memories from start to finish to meet customer PPA spec
Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teamsRequirement12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
Strong understanding of Digital Circuit design techniques in FinFET technologies
Exposure to complete design cycle of SRAM memory and compiler development
Supervise layout engineers and review layout for optimality
Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
Experience with LEC tools (ESPCV)
Ability to review and coordinate layout activities
Silicon debug and bring up experience is required
Working knowledge of scripting in Perl/Python
Willingness to collaborate closely with cross functional teams across the globe
- Location:
- San Jose
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