Senior ASIC Engineer, Static Timing Analysis
1 Days Old
Job Title
Pay Range: $50.64hr - $76hr
Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff. Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks. Requires a mix of SDC knowledge, EDA tool competence and Tcl based scri...
- Location:
- Santa Clara