Senior RF/Analog Design Engineer

3 Days Old

Arago Job Opportunity

The demand for more intelligence continues to accelerate in every industry, application, and device. Yet, general-purpose processors cannot take us much farther. To unlock the next breakthroughs, Arago is developing a processor that harnesses the unique physical properties of light to address both memory and computational limitations.

We are a team of AI engineers and physicists who believe in great science and fast achievements. We're looking for bold jack-of-all-trades who love to ship products quickly.

Our team is driven by these core values:

  1. Do great things: We're going after a 10x, not 10%. It requires intensity, craftsmanship and great science
  2. We move as one: Our relationships are built on trust and mutual admiration. We feel empowered and fortunate to collaborate with one another.
  3. Keep looking ahead: Lasting technologies and impactful ventures are not built overnight. We take it one step at a time, with velocity.

Collaborate with RFIC and FPGA teams to design, integrate, and optimize mixed-signal systems, including ADCs, optical readout, and power management, to interface Arago's optical processing unit with digital control.

Desired skill set:

  • A sound mathematical understanding and deep physical intuition of analog electronics, as well as analog voltage-to-current and current-to-voltage conversion at low and high frequencies.
  • Experience in designing high-precision analog systems for signal processing or power electronics. Experience working with high-frequency analog signals is valued.
  • Extensive experience in IC design and layout, using standard industry tools (e.g., Cadence suite).
  • Proficiency in designing and optimizing mixed-signal circuits, including DACs and ADCs at low (kHz-MHz) and high (>GHz) frequencies, and signal conditioning circuits, ensuring flawless integration between analog RF components and digital processors.
  • Strong understanding of signal integrity, crosstalk, and noise reduction techniques in mixed-signal environments, particularly in high-frequency RF systems interfacing with digital processors.
  • Advanced node experience required (<28nm), experience in GF 22FDX is highly valued.

Missions & responsibilities:

  • Design and integrate a large system of parallel analog-to-digital converters to interface the optical processing unit with a digital control chip.
  • Design the optical readout circuitry, which will be responsible for precisely converting an optical intensity signal into an electrical signal and manipulating it using active and passive analog components.
  • Participate in the design of the power management system, specifically related to the aforementioned readout circuit.
  • Develop precise calibration systems and protocols for the electronic parts of Arago's optical processing unit, ensuring the accuracy of the analog operations performed.
  • Collaborate with the RFIC and FPGA teams to design, simulate, and validate mixed-signal circuits that bridge analog IC with digital processors, ensuring high performance in high-frequency regimes.
  • Oversee the integration of mixed-signal designs into the overall system, perform debugging and validation of prototypes, and provide solutions to challenges related to signal integrity, noise management, and system interoperability.
  • Logical implementation for the signal processing on analog nodes.
  • Implementation of error correction logic.
  • Implementation of existing IP for serial and parallel interfacing at high clock rates.

Rewards & perks:

  • Competitive cash compensation that reflects your expertise and experience.
  • Stock options.
  • Ownership of a key technical area.
  • Being part of the very early days of one of the hottest AI startups (still in stealth mode).
  • A fun, dynamic, and multicultural team in a collaborative work environment.
  • Exciting growth opportunities.

Selection process:

  1. CV and technical project reviews.
  2. 45-minute call with the CEO.
  3. Take-home technical assignment.
  4. 1-hour technical call with the CTO, CSO, CEO and potential other team members.
Location:
Mountain View

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